A 24-pulse rectifier cascaded multilevel inverter with minimum number of transformer windings

A. Joseph, J. Wang, Z. George Pan, Lei Chen, Fang‐Zheng Peng

Fourtieth IAS Annual Meeting. Conference Record of the 2005 Industry Applications Conference, 2005. · 2005 · 32 citations · 8 references

Concepts

Abstract

This paper addresses the design of a medium voltage adjustable speed drive (ASD) utilizing the benefits of cascaded inverter technology while employing a 24-pulse rectifier inspired front end. Rectifier front ends of ASDs introduce a high level of harmonics into the utility grid, creating equipment overheating problems and distorting the voltage waveform near the ASD's connection point. To greatly reduce these harmonics while limiting cost, a cascaded multilevel inverter utilizing a 24-pulse transformer with a minimum number of windings is used. This design reduces the total harmonic current to less than 5% of the full load current over the entire frequency range. Simulation and experimental results are presented to show proof of concept.

References

8