Realizability conditions and bounds on synthesis of switched-capacitor DC-DC voltage multiplier circuits

Abstract

A formal study of the theoretical performance of switched-capacitor (SC) dc-dc voltage multiplier circuits is given. A question concerning the necessary number of circuit elements to realize a given conversion ratio is addressed. In response to the question the bound on attainable voltage ratio for a given number of capacitors k and the bound on the number of switches required in any circuit configuration have been established. The maximum step-up or step-down ratio is given by the kth Fibonacci number, while the bound on the number of switches required in any SC circuit is 3k-2. The complete set of attainable DC conversion ratios is found. A canonical circuit realization of the maximum voltage ratio is discussed and illustrative examples are included. Necessary and sufficient conditions for the realizability of a dc conversion ratio are determined and formal proofs are given.