IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 1999 · 24 citations · 9 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureMicroelectronicsReconfigurable ComputingAccelerator ArchitectureClock ManagementDigital Signal ProcessingFpga ArchitectureHardware AccelerationReconfigurable System ArchitectureDigital Signal Processing Block ArchitectureDigital Signal Processing BlocksDynamic Circuit ReconfigurationFast Fourier TransformFourier TransformHigh-speed Cmos DesignPrecisionSignal Processing Accelerators
This paper presents an optimized column fast Fourier transform (FFT) architecture, which utilizes bit-serial arithmetic and dynamic reconfiguration to achieve a complete overlap between computation and communication. As a result, for a clock rate of 40 MHz, the system can compute a 24-b precision 1K point complex FFT transform in 9.2 /spl mu/s, far surpassing the performance of any existing FFT systems.
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An algorithm for the machine calculation of complex Fourier series
J.W. Cooley, John W. Tukey · Mathematics of Computation · 1965 · 12.2K citations
W. Morven Gentleman, Gordon Sande · 1966 · 522 citations · Full text