A complete single-chip implementation of the JPEG image compression standard

Concepts

EngineeringComputer EngineeringComputer ScienceComputer ArchitectureEmbedded SystemsSystem-on-chip DesignData CompressionDigital Image ProcessingImage CompressionImage ProcessingMicrocontroller ArchitectureStream ProcessingData Stream IntegrationDie DesignVideo Compression

Abstract

The authors present a still-picture compression chip which integrates the whole of the JPEG (Joint Photographic Experts Group) baseline standard, from image input to coded data stream output. The design has been implemented on a 1.2- mu m CMOS process with a die size of 10*9 mm. An onboard microcontroller handles the interpretation and assembly of the compressed data stream.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>

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