Hardness assurance and testing techniques for high resolution (12- to 16-bit) analog-to-digital converters

Abstract

This paper discusses hardness assurance and testing techniques to test and evaluate total dose radiation degradation of high resolution A/D converters. A 16-bit converter with internal calibration is compared with older designs (12-/14-bit) that use more conventional architectures. The results show that measurements of dc parameters and static linearity at major code transitions should be adequate for hardness assurance testing with considerable cost savings compared to full dynamic or all-codes testing. The failure level of CMOS and BiCMOS converters depends on dose rate in a complicated way that is not adequately addressed by high-temperature annealing. Tests at low dose rates - below 0.01 rad(Si)/s - are recommended for space applications of these technologies.