A low voltage low power highly linear CMOS quadrature mixer using transconductance cancellation technique

Abstract

This paper presents a low voltage low power high linearity quadrature mixer for software defined radio applications in a 90nm CMOS technology. A 7-dB improvement of input-referred 3 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rd</sup> -order intermodulation point (IIP <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> ) is achieved by using a differential g <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</inf> ″ (the second derivation of transconductance) canceling technology. The negative value of g <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</inf> ″ in saturated pseudo differential transistor (PDT) is compensated by the positive value of PDT in subthreshold region. The even-order distortion is eliminated by differential PDTs. The mixer consumes a dc power of only 3.8mW under 1V supply. The conversion gain with 10 samples is 3.6∼7.2 dB in the frequency range of 0.3∼6 GHz. the IIP <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> is 7.9∼12.3 dBm 0.3∼6 GHz, whereas the single-sideband noise figure (SSB NF) is 11.1∼14.7 dB.