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Wavelet spectral dimension reduction of hyperspectral imagery on a reconfigurable computer
42
Citations
4
References
2005
Year
Unknown Venue
EngineeringMultispectral ImagingHardware AlgorithmComputer ArchitectureHyperspectral ImageryImage AnalysisPattern RecognitionReconfigurable ComputerCoarse Grain ParallelismComputational ImagingMachine VisionSynthetic Aperture RadarImaging SpectroscopyDimension ReductionSpectral ImagingComputer EngineeringComputer ScienceReconfigurable ArchitectureWavelet TheoryHyperspectral ImagingHardware AccelerationRemote Sensing
Hyperspectral imagery, by definition, provides valuable remote sensing observations at hundreds of frequency bands. Conventional image classification (interpretation) methods may not be used without dimension reduction preprocessing. Automatic wavelet reduction has been proven to yield better or comparable classification accuracy, while achieving substantial computational savings. However, the large hyperspectral data volumes remain to present a challenge for traditional processing techniques. Reconfigurable computers (RCs) can leverage the synergism between conventional processors and FPGAs to provide low-level hardware functionality at the same level of programmability as general-purpose computers. We investigate the potential of using RCs for on-board, i.e. aboard airborne/spaceborne carriers, preprocessing of hyperspectral imagery by prototyping for the first time the automatic wavelet dimension reduction algorithm. Our investigation exploits the fine and coarse grain parallelism provided by the RCs and has been experimentally verified on one of the state-of the art reconfigurable platforms, SRC-6E. An order of magnitude speedup over traditional processing techniques has been reported.
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