Self-Aligned Top-Gate Coplanar In-Ga-Zn-O Thin-Film Transistors

Abstract

Self-aligned techniques are often used in conventional CMOS and Si-based thin-film transistors (TFTs) technologies due to various merits. In this paper, we report self-aligned coplanar top-gate InGaZnO TFTs using PECVD a-SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">infin</sub> :H patterned to have low hydrogen content in the channel region and high hydrogen content in the source/drain region. After annealing to induce hydrogen diffusion from a-SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">infin</sub> :H into the oxide semiconductor, the source-drain regions become more conductive and yet the channel region remains suitable for TFT operation, yielding a working self-aligned TFT structure. Such fabrication involves neither back-side exposure nor ion implantation, and thus may be compatible with the typical and cost-effective TFT manufacturing.