A 14∼23 GHz CMOS MMIC distributed doubler with a 22-dB fundamental rejection

Abstract

A broadband MMIC frequency distributed doubler fabricated by 0.18-μm CMOS technology has been designed to operate from 14 to 23 GHz. In order to reject the fundamental signals, the traditional low-pass drain line was replaced by a high-pass structure. The topology can improve the fundamental rejection without additional balanced structure, thus the chip size can be minimized. This measured conversion loss is less than 14 dB and the fundamental rejection is better than 22 dB for the output frequency between 14 and 23 GHz. The chip size is only 0.54 × 0.38 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .