Multilevel selective harmonic elimination PWM technique in series-connected voltage inverters

Abstract

Selective harmonic elimination pulsewidth modulation (SHEPWM) method is systematically applied for the first time to multilevel series-connected voltage-source PWM inverters. The method is implemented based on optimization techniques. The optimization starting point is obtained using a phase-shift harmonic suppression approach. Another less computationally demanding harmonic suppression technique, called a mirror surplus harmonic method, is proposed for double-cell (five-level) inverters. Theoretical results of both methods are verified by experiments and simulations for a double-cell inverter. Simulation results for a five-cell (11-level) inverter are also presented for the multilevel SHEPWM method.