High-efficiency power amplifier design including input harmonic termination

Abstract

This letter presents the design of a high-efficiency Class-F power amplifier in pseudomorphic high electron mobility transistor technology using a novel load-pull/source-pull simulation-based approach. The second harmonic input termination is shown to have a critical influence on performance, which is justified by the shape of the simulated waveforms. Experimental validation is carried out on a 2-GHz practical circuit using a medium-power packaged device. Two cases are compared both theoretically and experimentally: for the best and worst case second harmonic input terminations, 76% and 42% saturated power-added efficiency are measured, respectively. In addition, the worst case termination degrades the saturated C/I3 by 7.5dB.