Lumped versus distributed RC and RLC interconnect impedances

Abstract

A Fourier analysis of on-chip signals in CMOS integrated circuits is presented in this paper. It is demonstrated that on-chip signals can be approximated by a Fourier series up to the 15th harmonic component. The effective load impedance characterizing a distributed RC and RLC line driven by a CMOS logic gate is based on a Fourier analysis of the on-chip signals. The voltage waveform based on the effective load impedance approaches a distributed RC and RLC line approximated by sections of lumped RC and RLC elements.