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A 0.7dB insertion loss CMOS–SOI antenna switch with more than 50dB isolation over the 2.5 to 5GHz band
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Citations
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References
2002
Year
Electrical EngineeringInsertion Loss CmosSoi TechnologyEngineeringRf SemiconductorAdvanced Packaging (Semiconductors)Microwave TransmissionAntennaUnderlying OxideIntegrated CircuitsMicroelectronicsHigh ResistivityInterconnect (Integrated Circuits)
Taking full advantage of the high resistivity substrate and underlying oxide of SOI technology, a high performance CMOS SPDT T/R switch has been designed and fabricated in a partially depleted, 0.25µm SOI process. The targeted Bluetooth class II specifications have been fully fitted. The switch over the high resistivity substrate exhibits a 0.7dB insertion loss and a 50dB isolation at 2.4GHz; at 5GHz insertion loss and isolation are 1dB and 47dB respectively. The measured ICP1dBis +12dBm.
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