A 1-V analog CMOS front-end for detecting QRS complexes in a cardiac signal

K. Lasanen, J. Ko

IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications · 2005 · 34 citations · 15 references

Concepts

Abstract

A low-voltage low-power signal processing chip for electrocardiogram measurements has been designed and manufactured. The circuit includes a continuous time, offset-compensated preamplifier with an amplification of 40 dB, an eighth-order Butterworth switched-opamp switched-capacitor (SO-SC) filter with a passband of 8-30 Hz, a 32-kHz crystal oscillator, an SO-SC postamplifier, and a bias circuit. The whole circuit operates with supply voltages from 1.0 to 1.8 V and the measured average current consumption is only about 3 /spl mu/A. The circuit is therefore very suitable for portable applications such as heart rate detectors.

References

15