Publication | Closed Access
AES-Based Cryptographic and Biometric Security Coprocessor IC in 0.18-μm CMOS Resistant to Side-Channel Power Analysis Attacks
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Citations
3
References
2005
Year
Unknown Venue
Hardware TrojanEngineeringTemplate StorageInformation SecurityComputer Architecture0.18-μM Cmos ResistantConfidential ComputingEmbedded SystemsSide-channel AttackHardware SecurityTrusted Execution EnvironmentHardware Security SolutionEmbedded Security CoprocessorAes-based CryptographicCryptanalytic AttackElectrical EngineeringData Encryption StandardComputer EngineeringLightweight CryptographyComputer ScienceMicroelectronicsData SecurityCryptographyDynamic Differential LogicSide-channel AnalysisPhysical Unclonable Function
This paper describes an embedded security coprocessor that consists of four components: an advanced encryption standard (AES) based cryptographic engine, a fingerprint matching oracle, template storage, and an interface unit. Two functionally-identical coprocessors are fabricated using a TSMC 6M 0.18-/spl mu/m process. The first coprocessor uses standard cells and encrypts at 3.84 Gb/s. The second coprocessor uses wave dynamic differential logic (WDDL) combined with differential routing to combat side-channel information leakage through power analysis attacks. It encrypts at 0.99 Gb/s. The coprocessor is part of a security-partitioned embedded system called ThumbPod.
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