Decoupled Double Synchronous Reference Frame PLL for Power Converters Control

TLDR

This paper addresses the critical challenge of detecting the fundamental-frequency positive-sequence component of utility voltage in grid-connected power converters under unbalanced and distorted conditions. It proposes a positive-sequence detector based on a new decoupled double synchronous reference frame phase-locked loop (DDSRF-PLL) that eliminates the detection errors of conventional SRF-PLLs. The DDSRF-PLL transforms both positive- and negative-sequence voltage components into a double synchronous reference frame, then uses a decoupling network to isolate the positive sequence, with its design and derivation validated by simulation and experimental tests on a DSP-based prototype. The resulting DDSRF-PLL delivers fast, precise, and robust positive-sequence voltage detection even under unbalanced and distorted grid conditions, as confirmed by simulation and laboratory experiments.

Abstract

This paper deals with a crucial aspect in the control of grid-connected power converters, i.e., the detection of the fundamental-frequency positive-sequence component of the utility voltage under unbalanced and distorted conditions. Specifically, it proposes a positive-sequence detector based on a new decoupled double synchronous reference frame phase-locked loop (DDSRF-PLL), which completely eliminates the detection errors of conventional synchronous reference frame PLL's (SRF-PLL). This is achieved by transforming both positive- and negative-sequence components of the utility voltage into the double SRF, from which a decoupling network is developed in order to cleanly extract and separate the positive- and negative-sequence components. The resultant DDSRF-PLL conducts then to a fast, precise, and robust positive-sequence voltage detection even under unbalanced and distorted grid conditions. The paper presents a detailed description and derivation of the proposed detection method, together with an extensive evaluation using simulation and experimental results from a digital signal processor-based laboratory prototype in order to verify and validate the excellent performance achieved by the DDSRF-PLL