2012 · 10 citations · 8 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureField-programmable Gate ArraysReconfigurable ComputingAccelerator ArchitectureField-programmable Gate Array ArchitectureFpga ArchitectureGraphics Processing Unit ArchitectureHardware AccelerationReconfigurable AcceleratorsCompare-and-swapGpu SortingPower ConsumptionReal-time ProcessingReal-time Processing ArchitectureRobustnessSignal Processing AcceleratorsSorting
Ordered-statistic constant false alarm rate (OS-CFAR) detectors provide improved robustness over cell-averaging CFAR (CA-CFAR) detectors in multiple target and heterogeneous clutter environments. However, this benefit comes at the cost of generally increased processing time due to the need for a rank-ordering of the CFAR training data. Realtime implementations of OS-CFAR must consider this additional processing burden. In this paper, we present real-time FPGA and CPU/GPU implementations of OS-CFAR. A novel sorting architecture that scales linearly with window size is presented alongside traditional compare-and-swap and rank-only architectures in an FPGA. A rank-only GPU implementation is demonstrated alongside multi-threaded sorting and rank-only CPU implementations. Effects of training window size on throughput and power consumption are considered.
8
V. J. Rayward‐Smith, Thomas H. Cormen, Charles E. Leiserson et al. · Journal of the Operational Research Society · 1991 · 17K citations