Publication | Closed Access
FastForward for efficient pipeline parallelism
137
Citations
24
References
2008
Year
Unknown Venue
EngineeringComputer ArchitectureParallel ImplementationInterconnection Network ArchitectureProcessor ArchitectureHigh-performance ArchitectureSystems EngineeringParallel ComputingManycore ProcessorComputer EngineeringPipeline ParallelismEfficient Pipeline ParallelismComputer ScienceComputational ScienceEdge ComputingMulticore ArchitecturesOrdered Consistency ModelsParallel ProcessingMany-core ArchitectureParallel ProgrammingData-level Parallelism
Low overhead core-to-core communication is critical for efficient pipeline-parallel software applications. This paper presents FastForward, a cache-optimized single-producer/single-consumer concurrent lock-free queue for pipeline parallelism on multicore architectures, with weak to strongly ordered consistency models. Enqueue and dequeue times on a 2.66 GHz Opteron 2218 based system are as low as 28.5 ns, up to 5x faster than the next best solution. FastForward's effectiveness is demonstrated for real applications by applying it to line-rate soft network processing on Gigabit Ethernet with general purpose commodity hardware.
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