Estimation of the signal-to-noise ratio for on-chip wireless clock signal distribution (year 2000)

Abstract

The achievable signal-to-noise ratio for an 18-GHz wireless clock distribution system has been estimated by extrapolating from the current status of the clock receiver, the integrated antenna performance, and the understanding of noise sources and coupling mechanisms. It is estimated that a SNR of /spl sim/23 dB is achievable at the input of the frequency divider within the clock receiver block.