Globally-asynchronous locally-synchronous architectures to simplify the design of on-chip systems

Abstract

A novel methodology for realizing Globally-Asynchronous Locally-Synchronous (GALS) architectures is reported. We developed a library of predesigned modules that facilitate the assembly of independently clocked modules to on-chip systems. The components of this library establish high-performance data exchange channels which are instrumental in constructing flexible architectures. The validity of our concept is proven by applying it to an ASIC design with real-world complexity.