A time-delay-integration CMOS readout circuit for IR scanning

Abstract

This paper presents a CMOS readout circuit for an infrared focal plane arrays (FPA). The time delay and integration (TDI) technique is applied to increase the integration time and the signal-to-noise ratio of the readout circuit. By detecting the impedance of the photovoltaic mercury cadmium telluride (HgCdTe-MCT) photodiodes, the faulty photodiodes can be detected. Then the photocurrent at the faulty diodes is cut from the integration path. A test chip is designed using a 0.35 /spl mu/m CMOS process. The cell arrays are composed of 32 lines of four pixels. The chip consumes 100 mW at 3.3 V. It provides 2-MHz scanning speed with 77-dB dynamic range.