Design and performance of a main memory hardware data compressor

Abstract

In this paper we show that hardware main memory data compression is both feasible and worthwhile. We demonstrate that paging due to insufficient memory resources can reduce system performance several fold, and argue that hardware memory compression can eliminate this paging hence providing a substantial performance improvement. We describe the design and implementation of a novel compression method, the X-Match algorithm, which is efficient at compressing small blocks of data and suitable for high-speed hardware implementation. Our experimental investigation shows that on average the X-Match algorithm doubles the memory capacity for commonly used Unix applications. Furthermore, the substantial impact such memory compression has on overall system performance is demonstrated.