An adaptive bias controlled power amplifier with a load-modulated combining scheme for high efficiency and linearity

Abstract

This paper presents a highly efficient linear power amplifier with an adaptive bias control circuit. In the amplifier, two amplifiers are power-combined using load modulation networks and then gate biases are controlled according to the input signal envelope. The gate voltage shapes of the two amplifiers have been optimized by envelope simulation to maximize the power added efficiency for the ACLR of -30 dBc. For verification, an adaptively controlled power amplifier has been implemented at 2.14 GHz using 4 watts PEP LDMOSFET's and its bias circuit were constructed based on simulated control shapes. The performances of the amplifier were compared with the class AB and Doherty amplifiers using a one-tone and forward-link WCDMA signals. The measured PAE of the amplifier is 41 % at -30 dBc ACLR, while those of the class AB and Doherty amplifiers are 24.5 % and 28.1 %, respectively.