Binary-Weighted Digital-to-Analog Converter Design Using Floating-Gate Voltage References

Abstract

An implementation of a compact and programmable 10-bits floating-gate digital-to-analog converter (FGDAC) is described. In this implementation, nonvolatile floating-gate voltage references (epots) are employed together with unity-size capacitors to obtain the binary-weighted scale factors. The FGDAC, fabricated in a 0.5- mum CMOS process, occupies 0.208 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> of die area. The stored epot voltages drift 10_3% over the period of ten years at 25 degC and exhibit temperature coefficients of less than 37 ppm/degC. With the proposed design, INL and DNL values less than plusmn0.5LSB (LSB = 3 mV) and SFDR around 63 dB are obtained.