Two-chip MPEG-2 video encoder

Toshiyuki Kondo, Kazuhito Suguri, Mitsuo Ikeda, Tokiya Abe, Hiroaki Matsuda, Tsuneo Okubo, K. Ogura, Y. Tashiro, Nobutaka Ono, Taichi Minami,

IEEE Micro · 1996 · 23 citations · 6 references

Concepts

Abstract

Our two-chip, real time, MPEG-2, simple-profile-at-main-level encoder supports NTSC 4:2:0 video signals with only three external memories. We have developed a compact encoder chip set. The key features of this chip set are a low encoding delay based on a simple profile at main level; wide-range motion estimation, which it performs using a hierarchical search; a flexible, macroblock level pipeline architecture based on RISC CPUs; and three small peripherals with no glue logic: a VRAM, synchronous DRAM, and FIFO DRAM.

References

6