A 550 Mb/s radix-4 bit-level pipelined 16-state 0.25-μm CMOS Viterbi decoder

Abstract

In todays high-speed disk drive read channel ICs maximum likelihood detection using the Viterbi algorithm is a key component in reconstructing digital data sequences. The presented Viterbi decoder was realized in a 0.25 /spl mu/m CMOS technology. Using the proposed comparison approach, it achieves a throughput rate of 550 Mb/s.