IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 1995 · 105 citations · 8 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsVlsi DesignAnalog Integrated CircuitsCmos Circuit DesignDigital Integrated CircuitsDigital Signal ProcessingMixed-signal Integrated Circuit DesignMixed-signal IntegrationA-d ConversionAnalog-digital ConversionAnalog-to-digital ConversionAnalog-to-digital Converter DesignAnalog-to-digital Converter IntegrationAnalog-to-digital ConvertersConvertersHigh-speed Cmos Design
Although /spl Delta//spl Sigma/ modulators are widely used for low to moderate rate analog-to-digital conversion, the time oversampling requirement has discouraged their application to higher rate converters. This paper presents an architecture wherein multiple /spl Delta//spl Sigma/ modulators are combined so that neither time oversampling nor time interlacing are necessary. Instead, the system achieves the effect of oversampling from the multiplicity of modulators. For a system containing M P/sup th/-order /spl Delta//spl Sigma/ modulators, approximately P bits of accuracy are gained for every doubling of M. A major benefit of the architecture is that it retains much of the robustness of the individual /spl Delta//spl Sigma/ modulators to nonideal circuit behavior. As a result, the architecture offers the potential of integrating high-precision, high-speed A/D converters together with digital signal processing functions using VLSI processes optimized for digital circuitry. The paper presents the general architecture and provides a performance analysis closely supported by computer simulations.
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