Publication | Closed Access
Microarchitectural denial of service: insuring microarchitectural fairness
31
Citations
10
References
2002
Year
Unknown Venue
EngineeringInformation SecurityComputer ArchitectureMultithreading (Computer Architecture)Confidential ComputingHardware SecuritySmt ProcessorShared MemoryDenial-of-service AttackTrusted Execution EnvironmentParallel ComputingMicroarchitectural DenialConcurrent ProgrammingComputer EngineeringData PrivacyScheduling (Computing)Computer ScienceData SecurityCore Scheduling AlgorithmParallel Performance EvaluationProcessor CoreParallel Programming
Simultaneous multithreading seeks to improve the aggregate computation bandwidth of a processor core by sharing resources such as functional units, caches, TLB and so on. To date, most research investigating the scheduling of these shared resources has focused on enhancing computational bandwidth. In this paper, we examine scheduling fairness. First, we show that a thread running on an implementation of a SMT processor can suffer from denial of service by a malicious thread, slowing down the original thread by a factor of 10-20. Using performance counter hardware, we show that the slowdown occurs because of deliberate misuse of shared resources and design decisions that are necessary for high speed implementation. We then propose and evaluate a number of mechanisms to counter such malicious behavior: some affect the core scheduling algorithm and others simply attempt to identify activity that would affect threads sharing the same processor core. We find that harmful activity based mechanisms outperform core scheduling mechanisms. In addition, we show that they can be designed so that they can differentiate between malicious attacks and legitimate activities that may also make use of the same harmful activities.
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