IEE Proceedings F Communications, Radar and Signal Processing · 1982 · 55 citations · 1 references
EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsSemiconductor DevicesAnalog Integrated CircuitsAnalog IntegrationHigh-frequency Semiconductor DevicesMixed-signal Integrated Circuit DesignRadio-frequency Integrated CircuitsReceiver SystemsDirect Conversion ReceiversMonolithic ArchitectureRadio-frequency Integrated Circuit DesignReceiver ArchitectureReceiver Front-endsReceiver SensitivitySuperheterodyne ArchitectureSuperheterodyne Receivers
A review is made of radio paging receiver requirements and a new receiver architecture is described which uses a direct conversion (zero-IF) principle. This circuit is shown to have advantages over the conventional superheterodyne with high-frequency IF and in particular is shown to be suitable for monolithic realisation. A single chip which performs as a complete high-sensitivity VHF receiver is presented, and the resulting miniature pager is shown.
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