1998 · 12 citations · 2 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureHardware Description LanguagesParallel ComputingDigital Image ProcessingField-programmable Gate Array ArchitectureImage ProcessingParallel ArchitecturesParallel Computer ArchitectureRegister-transfer Level DesignDigital Signal Processing Block ArchitectureHigh-speed Cmos DesignImage Processing UnitsImage Signal ProcessingMemory ArchitectureProcessor ArchitectureSimd ArchitecturesVhdl
Architecture and design of the HiPAR-DSP, a SIMD controlled signalprocessor with parallel data paths, VLIW and novel memory design.The processor architecture is derived from an analysis of thetarget algorithms and specified in VHDL on register transfer level.A team of more than 20 graduate students covered the whole designprocess, including the synthesizable VHDL description, synthesis,routing and backannotation as the development of a complete softwaredevelopment environment.The 175mm{2}, 0.5µm 3LM CMOSdesign with 1.2 million transistors operates at 80 MHz and achievesa sustained performance of more than 600 million arithmetic operations.
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