2008 · 317 citations · 18 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureField-programmable Gate ArraysReconfigurable ComputingAccelerator ArchitectureGraphics Processing UnitsHardware AccelerationMulticore Processor DesignParallel ArchitecturesReconfigurable AcceleratorsAcceleratorsData Encryption StandardsField-programmable Gate Array AcceleratorsGaussian EliminationHardware ResourcesMemory BandwidthMiddlewareMiddleware Support
Accelerators are special purpose processors designed to speed up compute-intensive sections of applications. Two extreme endpoints in the spectrum of possible accelerators are FPGAs and GPUs, which can often achieve better performance than CPUs on certain workloads. FPGAs are highly customizable, while GPUs provide massive parallel execution resources and high memory bandwidth. Applications typically exhibit vastly different performance characteristics depending on the accelerator. This is an inherent problem attributable to architectural design, middleware support and programming style of the target platform. For the best application-to-accelerator mapping, factors such as programmability, performance, programming cost and sources of overhead in the design flows must be all taken into consideration. In general, FPGAs provide the best expectation of performance, flexibility and low overhead, while GPUs tend to be easier to program and require less hardware resources. We present a performance study of three diverse applications - Gaussian elimination, data encryption standard (DES), and Needleman-Wunsch - on an FPGA, a GPU and a multicore CPU system. We perform a comparative study of application behavior on accelerators considering performance and code complexity. Based on our results, we present an application characteristic to accelerator platform mapping, which can aid developers in selecting an appropriate target architecture for their chosen application.
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The Landscape of Parallel Computing Research: A View from Berkeley
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Engineering, Computer Science, High-performance Computing +17
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Scalable Parallel Programming with CUDA
John Nickolls, Ian Buck, Michael Garland et al. · Queue · 2008 · 1.6K citations · Full text
NVIDIA Tesla: A Unified Graphics and Computing Architecture
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