2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) · 2005 · 20 citations · 1 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsDigital CommunicationMicroelectronicsAnalog Integrated CircuitsAnalog IntegrationDigital Integrated CircuitsDigital Signal ProcessingMixed-signal Integrated Circuit DesignRadio-frequency Integrated CircuitsAnalog-to-digital Converter DesignAnalog-to-digital Converter IntegrationAnalog-to-digital ConvertersClock Data RecoveryClock RecoveryFull-duplex CommunicationJitter CompensationQuantization
A 0.18 /spl mu/m/sup 2/ CMOS quad transceiver provides 12.5 Gb/s full-duplex raw data throughput at 200 mW/channel consumption. An analog phase rotator in CDR (clock/data recovery) eliminates the quantization error of digital phase interpolation techniques, resulting in <17 ps peak-peak output jitter.
1
Fully-integrated SONET OC48 transceiver in standard CMOS
Afshin Momtaz, Jun Cao, M. Caresosa et al. · 2002 · 19 citations
Engineering, Computer Engineering, Electrical Engineering +17