Publication | Closed Access
Implementing pfairness on a symmetric multiprocessor
17
Citations
14
References
2004
Year
Unknown Venue
Cluster ComputingEngineeringComputer ArchitectureComputer-aided VerificationSupercomputer ArchitectureFormal VerificationOperations ResearchBus ContentionSystems EngineeringSymmetric MultiprocessorParallel ComputingJob SchedulerPfair SchedulerComputer EngineeringScheduling (Computing)Computer ScienceScheduling AnalysisScheduling ProblemReal-time Multiprocessor SystemCloud ComputingFormal MethodsMultiprocessor SystemParallel Programming
We consider the implementation of a Pfair scheduler on a symmetric multiprocessor (SMP). Simulations presented herein suggest that bus contention resulting from simultaneous scheduling decisions can substantially degrade performance. To correct this problem, we propose a staggered model for Pfair scheduling under which scheduling points are uniformly distributed over time.
| Year | Citations | |
|---|---|---|
Page 1
Page 1