Address generation for array access based on modulus m counters

Abstract

The necessary task of Address Generation for RAM and ROM accesses can often result in hardware taking up an appreciable fraction of the area of a data processing IC. Close examination of the address sequences can reveal symmetry which may be exploited to automatically devise small and simple address generators, based on counters. This paper will describe automated techniques used to recognise and develop symmetries in address sequences, and to synthesise the necessary address generation hardware.