Publication | Open Access
Si-CMOS-compatible lift-off fabrication of low-loss planar chalcogenide waveguides
108
Citations
17
References
2007
Year
Si-cmos-compatible Lift-off FabricationPhotonicsElectrical EngineeringWaveguidesEngineeringPhysicsRib WaveguidesApplied PhysicsStrip WaveguidesGuided-wave OpticPhotonic Integrated CircuitLoss PropagationSilicon On InsulatorMicroelectronicsPhotonic DeviceOptoelectronicsPlanar Waveguide Sensor
We demonstrate, for the first time to the best of our knowledge, low-loss, Si-CMOS-compatible fabrication of single-mode chalcogenide strip waveguides. As a novel route of chalcogenide glass film patterning, lift-off allows several benefits: leverage with Si-CMOS process compatibility; ability to fabricate single-mode waveguides with core sizes down to submicron range; and reduced sidewall roughness. High-index-contrast Ge(23)Sb(7)S(70) strip waveguides have been fabricated using lift-off with excellent uniformity of loss propagation and the lowest loss figure of reported to date. We also show that small core Ge(23)Sb(7)S(70) rib waveguides can be fabricated via lift-off as well, with loss figures lower than 0.5 dB/cm. Additionally, we find through waveguide modal analysis that although overall transmission loss is low, the predominant source of this loss comes from scattering at the sidewalls.
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