CMOS RF modeling for GHz communication IC's

Abstract

With the advent of submicron technologies, GHz RF circuits can now be realized in a standard CMOS process. A major barrier to the realization of robust commercial CMOS RF components is the lack of adequate models which accurately predict MOSFET device behavior at high frequencies. The conventional microwave table-lookup-based approach requires a large database obtained from numerous device measurements and computationally intense simulations for accurate results. This method becomes prohibitively complex when used to simulate highly integrated CMOS communication systems; hence, a compact model, valid for a broad range of bias conditions and operating frequencies is desirable. BSIM3v3 has been widely accepted as a standard CMOS model for low frequency applications. Recent work has demonstrated the capability of modeling CMOS devices at high frequencies by utilizing a complicated substrate resistance network and extensive modification to the BSIM3v3 source code. This paper first describes a unified device model realized with a lumped resistance network suitable for simulations of both RF and baseband analog circuits; then verifies the accuracy of the model to measured data on both device and circuit levels.