Empirical evaluation of some high-level synthesis scheduling heuristics

Abstract

Article Free Access Share on Empirical evaluation of some high-level synthesis scheduling heuristics Authors: Rajiv Jain Department of Electrical and Computer Engineering, University of Wisconsin, Madison, WI Department of Electrical and Computer Engineering, University of Wisconsin, Madison, WIView Profile , Ashutosh Mujumdar Department of Electrical and Computer Engineering, University of Wisconsin, Madison, WI Department of Electrical and Computer Engineering, University of Wisconsin, Madison, WIView Profile , Alok Sharma Department of Electrical and Computer Engineering, University of Wisconsin, Madison, WI Department of Electrical and Computer Engineering, University of Wisconsin, Madison, WIView Profile , Hueymin Wang Department of Electrical and Computer Engineering, University of Wisconsin, Madison, WI Department of Electrical and Computer Engineering, University of Wisconsin, Madison, WIView Profile Authors Info & Claims DAC '91: Proceedings of the 28th ACM/IEEE Design Automation ConferenceJune 1991 Pages 686–689https://doi.org/10.1145/127601.127751Online:01 June 1991Publication History 32citation330DownloadsMetricsTotal Citations32Total Downloads330Last 12 Months10Last 6 weeks1 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF