Stochastic implementation of motor controllers

Abstract

Many modern motor controllers are mixed structures containing a combination of artificial neural networks (ANNs) and classical control structures. Such controllers are usually implemented using DSPs but the software implementation of large ANNs leads to low operation speed. On the other hand, efficient hardware implementations of ANN have been achieved using stochastic principles whereby normal arithmetic operations are performed using random streams of bits instead of binary numbers. A dual-chip controller is normally necessary to exploit both the DSP flexibility and the speed of hardware implemented ANNs. To eliminate the complications of dual-chip controllers, a stochastic implementation methodology has been developed which is applicable to classical motor control systems so that they can be easily integrated together with ANN in the same chip. The new approach eliminates all interfacing problems and generates low-complexity circuits that can be downloaded into inexpensive FPGAs. This solution combines the advantages of software and hardware implementations into a single integrated circuit thereby reducing the cost and increasing the reliability of the controller.