Publication | Closed Access
New Generation of Predictive Technology Model for Sub-45nm Design Exploration
469
Citations
23
References
2006
Year
EngineeringVlsi DesignElectronic DesignNew GenerationIntegrated CircuitsAdvanced DesignSocial SciencesPhysical Design (Electronics)NanoelectronicsModeling And SimulationPredictive Mosfet ModelDevice ModelingDesign Space ExplorationElectrical EngineeringBias Temperature InstabilityDesignComputer EngineeringBulk CmosMicroelectronicsIndustrial DesignCircuit DesignPredictive Technology ModelBeyond Cmos
Predictive MOSFET model is critical for early circuit design research. To accurately predict the characteristics of nanoscale CMOS, emerging physical effects, such as process variations and physical correlations among model parameters, must be included. In addition, predictions across technology generations should be smooth to make continuous extrapolations. In this work, a new generation of predictive technology model (PTM) is developed to accomplish these goals. Based on physical models and early stage silicon data, PTM of bulk CMOS for 130nm to 32nm technology nodes is successfully generated. By tuning ten parameters, PTM can be easily customized to cover a wide range of process uncertainties. The accuracy of PTM predictions is comprehensively verified: for NMOS, the error of I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</sub> is 2% and for PMOS, it is 5%. Furthermore, the new PTM correctly captures process sensitivities in the nanometer regime. A webpage has been established for the release of PTM (http://www.eas.asu.edu/~ptm)
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