A 12-bit sigma-delta analog-to-digital converter with a 15-MHz clock rate

Abstract

A sigma-delta analog-to-digital converter that achieves 12-bit integral and differential linearity and nearly 13-bit resolution without trimming is described. The baseband width is 120 kHz with a first filter pole at 60 kHz, the clock frequency is 15 MHz, and only one 5-V power supply is needed. The circuit was realized in a p-well CMOS technology with 3-/spl mu/m minimum feature size. Compared with previous sigma-delta modulators, the input signal frequency and clock rate limit have been increased by one order of magnitude. To achieve this increase, a novel integrator concept was developed using bidirectional current sources. The circuit is fully self-contained, requiring only a 15-MHz crystal and one blocking capacitor as external elements. This converter was developed as the analog front end of a digital echo cancellation circuit for an integrated services digital network.