Publication | Closed Access
Evaluating One-Hot Encoding Finite State Machines for SEU Reliability in SRAM-based FPGAs
84
Citations
5
References
2006
Year
Unknown Venue
Triple Modular RedundancyEngineeringHardware Verification LanguageVerificationComputer ArchitectureFault ToleranceSystem ReliabilityDependable System ArchitectureFormal VerificationHardware SecuritySeu ReliabilityReliability EngineeringParallel ComputingHardware ReliabilityComputer EngineeringComputer ScienceMemory ArchitectureProtected One-hot FsmSram-based FpgasFsm Encoding StylesFormal MethodsCircuit ReliabilityFault Injection
This work discusses the use of two fault-tolerant techniques, duplication with self-checking and triple modular redundancy, for one-hot encoding FSM in SRAM-based techniques. The FSM encoding styles have a significant influence on the dependability of the machine in presence of bit-flips, known as single event upsets (SEUs). Although the one-hot encoding style presents the best trade-off in terms of reliability, modern synthesis tools tend to optimize crucial characteristic of the one-hot style. Consequently, techniques must be applied in the hardware description language to ensure reliability of protected one-hot FSM. Results present in this paper show that fault-tolerant techniques can be easily optimized by the tools reducing the robustness of the final design. Solutions in the RTL level are proposed to ensure reliability.
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