IEEE Transactions on Circuits & Systems II Express Briefs · 2008 · 74 citations · 7 references
EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicroelectronicsCmos Circuit DesignFrequency RegulationIntegrated Circuit DesignCmos Analog Circuit DesignCmos Analog Integrated CircuitsDropout VoltageLow-dropout RegulatorsMultiplication FactorPolesPower ConsumptionSlew Rate
An active-frequency compensation circuit for low- dropout regulators (LDOs) is presented. Compared with the conventional compensation scheme, the proposed circuit can greatly boost the effective current multiplication factor by at least one order of magnitude without increasing any power consumption. Hence, the proposed circuit can generate an internal lower frequency zero and push parasitic poles toward extremely high frequency such that the loop bandwidth can be extended drastically. The required on-chip capacitance is reduced to 0.4 pF, comparing to 5 pF in the conventional compensation scheme. The slew rate at the gate drive of the LDO is also improved by the proposed error amplifier. Implemented in a 0.35 mum 2P4M CMOS process, the LDO with the proposed active-frequency compensation circuit consumes 27 muA ground current at 150-mA maximum output current with a dropout voltage of 200 mV. Experimental results show that the proposed LDO structure has achieved only 10% settling time of the conventional compensation scheme.
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A CMOS bandgap reference circuit with sub-1-V operation
H. Banba, H. Shiga, Akira Umezawa et al. · IEEE Journal of Solid-State Circuits · 1999 · 886 citations