Analysis and design of a high-efficiency multistage Doherty power amplifier for wireless communications

TLDR

The paper analyzes a multistage Doherty amplifier to achieve higher efficiency at lower output power than the classical design. The authors derive generalized design equations for a three‑stage Doherty amplifier, extendable to N stages, and analyze the optimal device periphery to minimize AM‑AM distortion. The prototype delivers 33 dBm output with 42 % PAE at 6 dB back‑off and 27 % at 12 dB, outperforming single‑stage linear amplifiers by factors of 2 and 7, and achieving the best reported WCDMA Doherty performance to date.

Abstract

A comprehensive analysis of a multistage Doherty amplifier, which can be used to achieve higher efficiency at a lower output power level compared to the classical Doherty amplifier, is presented. Generalized design equations that explain the operation of a three-stage Doherty amplifier, which can be easily extended to an N-stage Doherty amplifier, are derived. In addition, the optimum device periphery, which minimizes AM-AM distortion for perfect Doherty amplifier operation, is analyzed. For the first time, a multistage Doherty power amplifier that meets wide-band code-division multiple-access (WCDMA) requirements is demonstrated. The designed power amplifier exhibits a power-added efficiency (PAE) of 42% at 6-dB output power backoff and 27% at 12-dB output power backoff. These PAEs are more than 2/spl times/ and 7/spl times/ better, respectively, than that of a single-stage linear power amplifier at the same output power backoff levels. The power amplifier is capable of delivering up to 33 dBm of output power, and has a maximum adjacent channel power leakage ratio of -35 and -47 dBc at 5- and 10-MHz offset, respectively. To the best of the authors' knowledge, these represent the best reported results of a Doherty amplifier for WCDMA application in the 1.95-GHz band to date.