Warp architecture and implementation

Abstract

A high-performance systolic army computer called Warp has been designed and mnsuucted. The machine ha a synolic prry of 10 or more llncarly connected cells, each of which is a proptammable processor capable of performing 10 million floating-point operations per second (10 IMFLGPS). A lb-cell machine therefore ha a peak performance of 100 MFIBPS. Warp is integrated into a UNlX host system. Program development is supported by a compiler. llie fmt 10-d machine became operational in 1986. Low-level vision processing for robot vehicles is one of the first applicatiotts of the machino This paper dcacribes the architecture and implementation of the Warp machine. and justiile-s and evaluates some of the amhita? anal features with systan, software and applimtion considaathn 1. Int reduction Warp is a high-performance systolic array computer designed to provide computation power for signal, image and low-level vi& ptocmsing: the machine's first applimtions are vision-based control algorithms for robot vehicles, and image atul@s for large imege databases A full-aule Warp machine consists of a linear systolic array of 10 or more identical cells. each of which is a 10 MFLOPS programmable processor. The proccsor atnty is integrated in a powerful host system, which provides an adequate dam bandwidth to sustain the amty at full speed in the targeted applications, and a general purpose computing environmatt, cpefdlcally tmx. for application programa IIIS rcwarch aa rqpportd in part by Dafw Mvanccd Reaacb Fmjccu &cncy fDOl>l. monitored by tic Air Force Avionlm tiw under Contract P'33615--81.K-l539, and Naval E&uontc Systema Corn--