Publication | Closed Access
Schmitt trigger as an alternative to buffer insertion for delay and power reduction in VLSI interconnects
29
Citations
11
References
2009
Year
Unknown Venue
Electrical EngineeringEngineeringVlsi DesignCircuit SystemVlsi ArchitectureMixed-signal Integrated CircuitComputer EngineeringComputer ArchitectureInterconnection NetworkVlsi InterconnectsInterconnection Network ArchitectureBuffer CircuitsCrosstalk DelayBus CodingMicroelectronicsPower ReductionInterconnect (Integrated Circuits)Schmitt Trigger
Interconnect bus coding typically neglects buffers, yet buffers restore signal levels while adding switching delay, and crosstalk further contributes to overall interconnect delay. The authors propose replacing buffers with Schmitt triggers to achieve signal restoration. Schmitt triggers, with lower threshold voltage and larger noise margin, allow earlier signal rise and reduce noise glitches. Simulation shows the Schmitt‑trigger replacement yields a 59 % delay reduction versus 45 % achieved by bus coding, eliminating the need for extra hardware.
In interconnect bus coding techniques the presence of buffers is often ignored. Buffers are used to restore the signal level affected by parasitics. However buffers have a certain switching time that contribute to overall signal delay. Further the transition that happens in interconnects also contribute to crosstalk delay. Thus the overall delay in interconnects is due to combined effect of both buffer and crosstalk delay. Here a replacement of buffers with Schmitt trigger has been proposed for the same purpose of signal restoration. Due to lower threshold voltage of Schmitt trigger signal can rise early and the large noise margin of schmitt trigger helps in reducing the noise glitches as well. Hence we don't need to add extra hardware for bus coding for the removal of higher crosstalk classes and delay reduction. Simulation results shows that the replacement process gives 59% delay reduction as compared to 45% in case of bus coding.
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