IEEE Transactions on Instrumentation and Measurement · 2009 · 21 citations · 6 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsEmbedded SystemsReal-time SystemsAnalog InstrumentationAnalog Integrated CircuitsDigital InstrumentationDigital Signal ProcessingMixed-signal Integrated Circuit DesignRadio-frequency Integrated CircuitsAnalog-to-digital ConversionFast Fourier TransformFourier TransformReal-time ProcessingReal-time Signal AcquisitionReal-time Signal ProcessingTruncationTruncation Rules
A 2.56-gigasample-per-second (GSPS) fixed-point fixed-precision dynamic kernel function fast Fourier transform (FFT) with a variable truncation scheme (VTS) is designed for real-time wideband signal detection. Using an Atmel 10-bit analog-to-digital converter (ADC), the two-tone real-time signal detection is verified for a bandwidth of 1.14 GHz with 20-MHz channelization and output throughput rates of 50 ns. The proposed design has an averaged single-signal spurious-free dynamic range (SFDR) of 27.7 dB and the ability to detect a weak input signal at -45 dBm. The overall dynamic range (DR) of the system is 40.6 dB. This is possible for a fixed-precision FFT design due to the embedded VTS to extend the total DR while preserving the instantaneous DR (IDR) relationship. In addition, with an ideal 8-bit ADC, the averaged single-signal SFDR of 32.60 dB and the two-tone signal IDR of 22 dB are achieved. The overall DR is 48.3 dB. The dynamic kernel FFT uses about 57% of the slices available on a Xilinx XC4VSX55 Virtex 4 field-programmable gate array (FPGA). In comparison with alternative implementations based on Xilinx LogicCORE 256-point IP FFT for 8-bit data, the processing time and the overall DR are considerably superior. Additional case studies that applying the windowing function and the Taylor-series-based square root approximation show favorable results utilizing the VTS for real-time data acquisition and signal-enhancement algorithms for computing high-bit-width data while minimizing the hardware.
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An algorithm for the machine calculation of complex Fourier series
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