Concepedia

An on-chip signal suppression countermeasure to power analysis attacks

Girish B. Ratanpal, Ronald D. Williams, Travis N. Blalock

IEEE Transactions on Dependable and Secure Computing · 2004 · 111 citations · 9 references

TL;DR

Side‑channel attacks such as DPA and SPA exploit power consumption traces to recover cryptographic keys by directly measuring or statistically analysing the hardware’s power usage. The paper proposes a circuit that can be added to cryptographic hardware to suppress power‑supply‑pin side‑channel leakage. The authors describe the design, simulation results, and limitations of the suppression circuit. The countermeasure dramatically raises the number of traces needed for a DPA attack and works without assumptions about the protected hardware’s design.

Abstract

There are several attacks that exploit the presence of side channels in hardware implementations of cryptographic algorithms to extract secret data. Differential power analysis (DPA) and simple power analysis (SPA) attacks sense the power consumption of the hardware to extract the secret cryptographic key. These attacks either directly examine the power traces or carry out statistical operations on the power traces obtained from the hardware while executing the cryptographic algorithm. This paper presents a circuit that can be added to crypto-hardware to suppress information leakage through the power supply pin side channel. We discuss the design, simulation results and the limitations of the suppression circuit. We show that this countermeasure significantly increases the number of power trace samples required to undertake a DPA attack. The countermeasure does not require any assumptions about the design of the hardware under protection.