Publication | Closed Access
A generalized algorithm for graph-coloring register allocation
97
Citations
15
References
2004
Year
Unknown Venue
EngineeringCompiler TechnologySingle Hardware RegisterComputer ArchitectureHardware SecurityGraph-coloring Register AllocationHigh-performance ArchitectureRegister NamesParallel ComputingCombinatorial OptimizationMemory ManagementCompiler SupportComputer EngineeringComputer ScienceGeneralized AlgorithmOptimizing CompilerGraph AlgorithmGraph TheoryProgram AnalysisParallel Programming
Graph-coloring register allocation is an elegant and extremely popular optimization for modern machines. But as currently formulated, it does not handle two characteristics commonly found in commercial architectures. First, a single register name may appear in multiple register classes, where a class is a set of register names that are interchangeable in a particular role. Second, multiple register names may be aliases for a single hardware register. We present a generalization of graph-coloring register allocation that handles these problematic characteristics while preserving the elegance and practicality of traditional graph coloring. Our generalization adapts easily to a new target machine, requiring only the sets of names in the register classes and a map of the register aliases. It also drops easily into a well-known graph-coloring allocator, is efficient at compile time, and produces high-quality code.
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