A Low-Power Low-Noise Dual-Chopper Amplifier for Capacitive CMOS-MEMS Accelerometers

Abstract

This paper reports a novel dual-chopper amplifier (DCA) and its application to monolithic complementary metal-oxide semiconductor-microelectromechanical systems accelerometers. The DCA design minimizes the power consumption and noise by chopping the sensing signals at two clocks. The first clock is a high frequency for removing the flicker noise while the second clock is a significantly lower frequency to keep the unit gain bandwidth low. A monolithic three-axis accelerometer integrated with the DCA on the same chip has been successfully fabricated using a post-CMOS micromachining process. The measured noise floors are 40 μ g/√Hz in the <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</i> - and <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">y</i> -axis and 130 μ g/√Hz in the <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">z</i> -axis, and the power consumption is about 1 mW per axis.