Publication | Closed Access
A fully monolithic 260-/spl mu/W, 1-GHz subthreshold low noise amplifier
75
Citations
3
References
2005
Year
Low-power ElectronicsEngineeringRf SemiconductorHigh-frequency DeviceMonolithic 260-/Spl Mu/wMixed-signal Integrated CircuitUnrestrained Bias TechniqueNoiseLow-noise AmplifierMicroelectronicsBeyond CmosMicro-power Complementary MetalRf SubsystemElectronic Circuit
A micro-power complementary metal oxide semiconductor (CMOS) low-noise amplifier (LNA) is presented based on subthreshold MOS operation in the GHz range. The LNA is fabricated in an 0.18-μm CMOS process and has a gain of 13.6 dB at 1 GHz while drawing 260 μA from a 1-V supply. An unrestrained bias technique, that automatically increases bias currents at high input power levels, is used to raise the input P1dB to -0.2 dBm. The LNA has a measured noise figure of 4.6 dB and an IIP3 of 7.2 dBm.
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